Ребята из FPGA комунити каждый день делают небольшую подборку новостей из мира FPGA и решили поделиться ею с читателями хаба FPGA. Внимание: возможны повторы!

Свежие отечественные статьи

  1. Что внутри ПЛИС или то, о чем не говорят в обучающих видео

  2. Основы статического временного анализа. Часть 2.2: System Synchronous Output Delay Constraint.

  3. Подключаем Slave-устройства с шиной Wishbone к системе на базе LiteX

  4. PCIExpress 1.0 2.5GT/s analyzer на базе ПЛИС своими руками

  5. HALF: целостное автоматическое машинное обучение для ПЛИС

  6. FPGA: конечные автоматы с переключаемым контекстом

Остальное англоязычное

  1. Implementation of Low-Density Parity Check on Field Programmable Gate Array DE1-SoC | IEEE Conference Publication | IEEE Xplore

  2. Industry's First COTS Mezzanine with 64 GSps ADC/DAC Sample Rates Is Introduced by Annapolis Micro Systems - Embedded Computing Design

  3. Webinar Technitive | Open the Hardware: FPGA revolution Entradas, Jue, 3 feb. 2022 a las 16:00 | Eventbrite

  4. Hardware-as-Code Part I: An Introduction - Hackster.io

  5. PYNQ Now Available for the Kria KV260 Vision AI Starter Kit - Announcements - PYNQ

  6. Introduction to FPGA Part 11 - RISC-V Softcore Processor | Digi-Key Electronics - YouTube

  7. FPGA Calculator (Basys3) - Hackster.io

  8. Measuring Circuit Delay for FPGA Timing using the ADP3450 - Hackster.io

  9. AXI4-Lite Interface Wrapper for Custom RTL in Vivado 2021.2 - Hackster.io

  10. Hello 2022 with Vintage Bubble Displays on the Arty Z7 - Hackster.io

  11. Ruag teams for AI in space

  12. Blueshift Memory adds UK industry veterans to advisory board

  13. FPGA Vs Microcontrollers - Another Approach to Embedded Design

  14. Common Mistakes in VHDL

  15. Everything You Need to Know about SystemVerilog Arrays

  16. Formal verification for SystemC/C++ designs - Tech Design Forum Techniques

  17. Основы статического временного анализа. Часть 2.2: System Synchronous Output Delay Constraint. - Общее - Разное - Каталог статей - FPGA-Systems

  18. FPGA Video AI deployment – From platform creation to AI deployment - Part 1

  19. TE0865-02-FBE23MA • Sundance.com

  20. Deploying Link™ Capture for Financial Applications

  21. Project Ember | Hackaday.io

  22. Programmable Photonics - Wim Bogaerts - Stanford - YouTube

  23. FPGA Debug | Capture Gigabytes. At Speed.

  24. Prototype and Adjust a Deep Learning Network on FPGA Video - MATLAB & Simulink

  25. What is FPGA Zynq UltraScale+ with MPSoC? | Acromag

  26. How Microchip FPGAs Can Improve Productivity in Motor Control Applications Using C++ with HLS | Microchip Technology

  27. Industry's First COTS Mezzanine with 64 GSps ADC/DAC Sample Rates Is Introduced by Annapolis Micro Systems - Annapolis Micro Systems, Inc.

  28. Intel’s FPGA Day Unveils 3 Collabs to Create More FPGA-based IPU Designs - News

  29. VHDL Generics – electgon

  30. Basys3 Oscilloscope - Hackster.io

  31. lvgl/lv_port_mps3_an547_cm55: A LVGL porting for Cortex-M55 running on an Arm official FPGA prototyping development board called MPS3 (AN547), see Figure 1. It is also possible to run the project template on an emulator called Corstone-300-FVP, which is free. Topics Resources

  32. JLPEA | Free Full-Text | CORDIC Hardware Acceleration Using DMA-Based ISA Extension

  33. Microcontroller in FPGA? This is how to do it ... | Step by Step Tutorial | Adam Taylor - YouTube

  34. ken-system: FPGA Implementation of Scalable Fully Coupled Annealing Processing Sysytem by Using Multi-chip Operation

  35. Google Unveils the Coral Dev Board Micro, Its First Microcontroller-Based TinyML Edge AI Board - Hackster.io

  36. QuickLogic Announces Australis™ eFPGA IP Generator :: QuickLogic Corporation (QUIK)

  37. The VLSI Handbook: Design Principles, Industry and Career Perspectives eBook : Kumar, Udit , Gupta, Aditya, Soman, Sumit: Amazon.in: Kindle Store

  38. MakarenaLabs/PYNQ-Microblaze-Tutorial: Simple tutorial for PYNQ that use microblaze for controlling GPIO

  39. IPsec Engine | Silex Insight

  40. How to Overcome the Pain Points of AI/ML Hardware Webinar

  41. HDL Verifier - MATLAB & Simulink

  42. Increase your productivity with Continuous Integration flows

  43. How a robust FPGA supply chain assures defense industry preparedness - Military Embedded Systems

  44. Semiconductor IP Verification | Exostiv Labs

  45. New RF FPGA solutions transform EW platforms - Military Embedded Systems

  46. 20220125 FPGA standup - YouTube

  47. FPGA Frontrunners Meet & Greet Tickets, Wed 23 Mar 2022 at 09:30 | Eventbrite

  48. 5G Open RAN

  49. 3U VPX FPGA modules first to market with high-bandwidth memory

  50. Array of Engineers Designs Custom SLVS-EC IP Core

  51. Build your own video pipeline with PYNQ composable overlays | LinkedIn

  52. RTLvision PRO Datasheet: Understand, Debug, and Integrate RTL Code, Easily - EDA Direct

  53. What is an FPGA

  54. racerxdl/riskow: Learning how to make a RISC-V

  55. CPU, GPU, FPGA or TPU: Which one to choose for my Machine Learning training? – InAccel

  56. EXOSTIV Blade - Scalable Visibility from Anywhere

  57. The Future of Embedded FPGAs — eFPGA: The Proof is in the Tape Out - Circuit Cellar

  58. Keysight Challenge NPB - YouTube

  59. FOSDEM 2022 - Friends of OpenJDK devroom

  60. MicroZed Chronicles: Scripting Vivado

  61. How do you convert a design in FPGA to an ASIC? | Sondrel

  62. Hog: HDL on git

  63. hog / hog · GitLab

  64. RehanEjaz/Pwm-FPGA-motor-speed-ctrl: Speed controller for DC motor to implement on FPGA

  65. Five Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC Webinar | Achronix Semiconductor Corporation

  66. PUF over FPGA - 01 Course intro - YouTube

  67. Q1_2022 Lattice Anti-Fragile Security & Post Quantum Crypto

  68. Open MPW & chipIgnite - Getting Started

  69. Multi-hetero Acceleration by GPU and FPGA for Astrophysics Simulation on oneAPI Environment | hgpu.org

  70. Secure platform for cloud-based AI services | Xiphera

  71. Hardware-as-Code Part I: An Introduction - Hackster.io

  72. Are We Poised to Turn the Optical Computing Corner? – EEJournal

  73. How does a flip flop work and why does it have setup & hold time? - YouTube

  74. Netnod goes live with Arista FPGA implementation of Network Time Security (NTS) | Netnod

  75. FPGA — DroneShield

  76. China Approves Chipmaker AMD’s $35 Billion Acquisition of Xilinx - Bloomberg

  77. Adaptive PMICs pair with PolarFire FPGAs - EDN

  78. GOWIN Semiconductor USB 2.0 PHY Interface and Device Controller IPs Achieve USB-IF Certification

  79. The Future of Embedded FPGAs — eFPGA: The Proof is in the Tape Out - Circuit Cellar

  80. FPGA beginner course PUF over FPGA - 02 What is a PUF and discussion of the project structure - YouTube

  81. Mastering the Migration Journey from Spartan-6 FPGAs to 7 Series and Beyond

  82. Infineon Accelerates Development of IBIS-AMI Models for SerDes Designs - MATLAB & Simulink

  83. How does a flip flop work and why does it have setup & hold time? - YouTube

  84. China Approves Chipmaker AMD’s $35 Billion Acquisition of Xilinx - Bloomberg

  85. Accelerate AI applications using VITIS AI on Xilinx ZynqMP UltraScale+ FPGA - Softnautics

  86. Ethernet Communication using TCP protocol in Zynq processor in VIVADO 2018.2. - YouTube

  87. Ruag teams for AI in space

  88. In the Qwiic of Time - News - SparkFun Electronics

  89. Deploying Deep Learning on Embedded CPUs, GPUs, and FPGAs Video - MATLAB

  90. FPGA programming - what is it, how it works and where it can be used - CodiLime

  91. Your access to this site has been limited by the site owner

  92. Taming the Accelerator Cambrian Explosion with Omnia | LinkedIn

  93. IBM doubles QRadar Network Insights performance

  94. Multi-hetero Acceleration by GPU and FPGA for Astrophysics Simulation on oneAPI Environment | hgpu.org

  95. 029 - Floating-Point FPGA Audio Limiter (1) | RTL Audio Lab

  96. Semiconductor Engineering - Semiconductor events

  97. Lattice SupplyGuard

  98. Deep physical neural networks trained with backpropagation | Nature

  99. The Future of Embedded FPGAs — eFPGA: The Proof is in the Tape Out - Circuit Cellar

  100. 3U VPX FPGA modules first to market with high-bandwidth memory

  101. Products of the Week: January 19, 2022 | Electronic Design

  102. Analysis of the sales market for FPGA modules up to 2029 - winnquick.com

  103. FPGA-based reliable TMR controller design for S2A architectures | IEEE Conference Publication | IEEE Xplore

  104. Video: APA7-500 Series: User Configurable FPGA I/O Modules | Acromag

  105. mjs19999/AES_in_verilog: An algorithmic state machine verilog code for AES Encryption/Decryption Algorithm

  106. DO-254 Training: Learn This Important Standard for Aviation Hardware Safety | LinkedIn

  107. Will the rise of AI and the Internet of Things subvert the design of Embedded Systems? | LinkedIn

  108. Lattice Certus-NX Versa Evaluation Board Roadtest Review - element14 Community

  109. DINI Group Announces HardwareSharkTM: Solves Packet Loss Issues in Wireshark With an FPGA-Based Memory Buffer. - Technology

  110. HFT with FPGA - webinar

  111. Porting incompressible flow matrix assembly to FPGAs for accelerating HPC engineering simulations | IEEE Conference Publication | IEEE Xplore

  112. Implementation of NLOS based FPGA for distance estimation of elderly using indoor wireless sensor networks - ScienceDirect

  113. Accelerate AI applications using VITIS AI on Xilinx ZynqMP UltraScale+ FPGA - Softnautics

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