void usb_init(void)
{
	// Setup state information
	usb_state = DEFAULT;
	usb_bm_state = 0;

	// Setconfig configuration information
	usb_current_config = 0;
	usb_current_alt_interface = 0;
	
	// Disconnect from USB-bus since we are in this routine from a power on and not a soft reset:

	usbcs |= 0x08;
	delay_ms(50);
	usbcs &= ~0x08;

	/*intterrupt enable uresie,suspie,sutokie,sudavie */
	usbien = 0x1d; 
	/*Endpoint 0 to 5 IN interrupt enables (in_ien)*/
	in_ien = 0x01;
	/*Endpoints 0 to 5 IN interrupt request register (in_irq)  - clear interrupt*/
	in_irq = 0x1f;
	/*Endpoint 0 to 5 OUT interrupt enables (out_ien)*/
	out_ien = 0x01;
	/*Endpoints 0 to 5 OUT interrupt request register (out_irq) - clear in interrupt*/
	out_irq = 0x1f;

	// Setup the USB RAM with some OK default values:
	bout1addr = MAX_PACKET_SIZE_EP0/2;
	bout2addr = MAX_PACKET_SIZE_EP0/2 + USB_EP1_SIZE/2;
	bout3addr = MAX_PACKET_SIZE_EP0/2 + 2*USB_EP1_SIZE/2;
	bout4addr = MAX_PACKET_SIZE_EP0/2 + 3*USB_EP1_SIZE/2;
	bout5addr = MAX_PACKET_SIZE_EP0/2 + 4*USB_EP1_SIZE/2;
	binstaddr = 0xc0;
	bin1addr = MAX_PACKET_SIZE_EP0/2;
	bin2addr = MAX_PACKET_SIZE_EP0/2 + USB_EP1_SIZE/2;
	bin3addr = MAX_PACKET_SIZE_EP0/2 + 2*USB_EP1_SIZE/2;
	bin4addr = MAX_PACKET_SIZE_EP0/2 + 3*USB_EP1_SIZE/2;
	bin5addr = MAX_PACKET_SIZE_EP0/2 + 4*USB_EP1_SIZE/2;

	// Set all endpoints to not valid (except EP0IN and EP0OUT)
	/*Endpoints 0 to 5 IN valid bits (Inbulkval)*/
	inbulkval = 0x01;
	/*Endpoints 0 to 5 OUT valid bits (outbulkval)*/
	outbulkval = 0x01;
	/*Isochronous IN endpoint valid bits (inisoval)*/
	inisoval = 0x00;
	/*Isochronous OUT endpoint valid bits (outisoval)*/
	outisoval = 0x00;

	/* Switch ON Endpoint 1 */
	
	/*Endpoint 0 to 5 OUT interrupt enables (out_ien)* - out1ien */
	in_ien |= 0x02; 
	
	/*Endpoints 0 to 5 OUT valid bits (outbulkval)*/
	inbulkval |= 0x02;
	
	/*Endpoint 0 to 5 OUT interrupt enables (out_ien)*/
	out_ien |= 0x02;
	
	/*Endpoints 0 to 5 OUT valid bits (outbulkval)*/
	outbulkval |= 0x02;
	/* Endpoint 0 to 5 OUT byte count registers (outxbc) ?Maybe 0xff is register clear*/
	out1bc = 0xff;
	
	/* Switch ON Endpoint 2 */
	
	/*Endpoint 0 to 5 OUT interrupt enables (out_ien)* - out1ien */
	in_ien |= 0x04; 
	
	/*Endpoints 0 to 5 OUT valid bits (outbulkval)*/
	inbulkval |= 0x04;
	
	/*Endpoint 0 to 5 OUT interrupt enables (out_ien)*/
	out_ien |= 0x04;
	
	/*Endpoints 0 to 5 OUT valid bits (outbulkval)*/
	outbulkval |= 0x04;
	/* Endpoint 0 to 5 OUT byte count registers (outxbc) ?Maybe 0xff is register clear*/
	out2bc = 0xff;		
	
	/* Switch ON Endpoint 3 */
	
	/*Endpoint 0 to 5 OUT interrupt enables (out_ien)* - out1ien */
	in_ien |= 0x08; 
	
	/*Endpoints 0 to 5 OUT valid bits (outbulkval)*/
	inbulkval |= 0x08;
	
	/*Endpoint 0 to 5 OUT interrupt enables (out_ien)*/
	out_ien |= 0x08;
	
	/*Endpoints 0 to 5 OUT valid bits (outbulkval)*/
	outbulkval |= 0x08;
	
	/* Endpoint 0 to 5 OUT byte count registers (outxbc) ?Maybe 0xff is register clear*/
	out3bc = 0xff;		
	
}

static void isr_sudav()
{
	bmRequestType = setupbuf[0];
	
	/* Host-to-device standart request */
	if((bmRequestType & 0x60 ) == 0x00)
	{
		switch(setupbuf[1])
		{
		case USB_REQ_GET_DESCRIPTOR:
			usb_process_get_descriptor();
			break;

		case USB_REQ_GET_STATUS:
			usb_process_get_status();
			break;

		case USB_REQ_SET_ADDRESS:
			usb_state = ADDRESSED;
			usb_current_config = 0x00;
			break;

		case USB_REQ_GET_CONFIGURATION:
			switch(usb_state)
			{
			case ADDRESSED:
				in0buf[0] = 0x00;
				in0bc = 0x01;
				break;
			case CONFIGURED:
				in0buf[0] = usb_current_config;
				in0bc = 0x01;
				break;
			case ATTACHED:
			case POWERED:
			case SUSPENDED:
			case DEFAULT:
			default:
				USB_EP0_STALL();
				break;
			}
			break;

		case USB_REQ_SET_CONFIGURATION:
			switch(setupbuf[2])
			{
			case 0x00:
				usb_state = ADDRESSED;
				usb_current_config = 0x00;
				USB_EP0_HSNAK();
				break;
			case 0x01:
				usb_state = CONFIGURED;
				usb_bm_state |= USB_BM_STATE_CONFIGURED;
				usb_current_config = 0x01;
				USB_EP0_HSNAK();
				break;
			default:
				USB_EP0_STALL();
				break;
			}
			break;

		case USB_REQ_GET_INTERFACE: // GET_INTERFACE
			in0buf[0] = usb_current_alt_interface;
			in0bc = 0x01;
			break;

		case USB_REQ_SET_DESCRIPTOR:
		case USB_REQ_SET_INTERFACE: // SET_INTERFACE
		case USB_REQ_SYNCH_FRAME:   // SYNCH_FRAME
		default:
			USB_EP0_STALL();
			break;
		}
	} 
	// bmRequestType = 0 01 xxxxx : Data transfer direction: Host-to-device, Type: Class
	else if((bmRequestType & 0x60 ) == 0x20)  // Class request
	{
		if(setupbuf[6] != 0 && ((bmRequestType & 0x80) == 0x00))
		{
			// If there is a OUT-transaction associated with the Control-Transfer-Write we call the callback
			// when the OUT-transaction is finished. Note that this function do not handle several out transactions.
			out0bc = 0xff;
		}
		else
		{
			USB_EP0_HSNAK();
		}
	} 
	/* Extended Compat ID OS Descriptor setupbuf[1] (bRequest) is equal to MS_VendorCode (0xAA is current program)*/
	else if(bmRequestType == 0xC0 && setupbuf[1] == MS_VENDORCODE) 
	{
		packetizer_pkt_size = MAX_PACKET_SIZE_EP0;
		//xprintf("Extended Compat ID\r");
		packetizer_data_ptr = g_usb_extended_compat_id;
		packetizer_data_size = MIN(setupbuf[6], packetizer_data_ptr[0]);
		packetizer_isr_ep0_in();	
	}
	/* Extended Properties OS Descriptor */
	else if(bmRequestType == 0xC1 && setupbuf[1] == MS_VENDORCODE)
	{
		packetizer_pkt_size = MAX_PACKET_SIZE_EP0;
		//xprintf("Extended Properties ID\r");
		packetizer_data_ptr = g_usb_extended_proper_os;
		packetizer_data_size = MIN(setupbuf[6], packetizer_data_ptr[0]);
		packetizer_isr_ep0_in();				
	}
	else  // Unknown request type
	{
		USB_EP0_STALL();
	}
}